Silvaco and ALDEC Partner for Analog-Mixed Signal Simulation

Joint Solution to be Demonstrated at the Design Automation Conference 2017 in Austin, TX June 18-21, 2017

Aldec LogoSANTA CLARA, Calif., –– June 15, 2017

June 15, 2017, Silvaco, Inc. and Aldec today announced they have collaborated to bring a new solution for analog-mixed signal simulation combining each company’s industry-leading simulation technologies to address the growing SoC mixed-signal verification challenge. The analog circuit is handled by Silvaco’s SmartSpice™, and the digital logic is simulated using Aldec’s Riviera-Pro™. The new mixed-signal capabilities will be demonstrated at Design Automation Conference (DAC) 2017 in Austin, Texas June 18-21 at the Silvaco booth #1447 and the Aldec booth #421.

Most designs today combine analog and digital logic, and the increasingly complex interactions between the two make mixed-signal simulation essential. This needs to be performed as early as possible in the design process, utilizing high-level models initially as they are available, and successive refinement as the design progresses. This requires high-performance simulation of each partition of the design, and a highly effective simulation interface for the two simulation engines.

Silvaco’s Smartspice is a well-known, popular high performance parallel SPICE simulator that delivers industry leading accuracy. Proven on countless designs worldwide down to 7nm FinFET, it provides both the capacity and capabilities needed for high precision analog circuit simulation. Aldec’s Riviera-PRO enables the verification productivity, reusability, and automation by combining the high-performance simulation engine, advanced debugging capabilities at different levels of abstraction, and support for the latest Language and Verification Library Standards. Extensive simulation optimization algorithms to achieve the highest performance in VHDL, Verilog/SystemVerilog, SystemC, and mixed-language simulations. Together, the combined solution delivers high performance and high capacity needed for today’s complex mixed-signal designs.

A preview of this Analog Mixed-signal solution is now available to Silvaco and Aldec customers. For details, contact Silvaco at or Aldec at


Aldec Inc., headquartered in Henderson, Nevada, is an industry leader in Electronic Design Verification and offers a patented technology suite including: RTL Design, RTL Simulators, Hardware-Assisted Verification, SoC and ASIC Prototyping, Design Rule Checking, CDC Verification, IP Cores, Requirements Lifecycle Management, DO-254 Functional Verification, Embedded Solutions and Military/Aerospace solutions.

About Silvaco, Inc.

Silvaco, Inc. is a leading EDA provider of software tools used for process and device development and for analog/mixed-signal, power IC and memory design. Silvaco delivers a full TCAD-to-sign-off flow for vertical markets including: displays, power electronics, optical devices, radiation and soft error reliability and advanced CMOS process and IP development. For over 30 years, Silvaco has enabled its customers to bring superior products to market with reduced cost and in the shortest time. The company is headquartered in Santa Clara, California and has a global presence with offices located in North America, Europe, Japan and Asia.

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