Silvaco Sponsors 6th International MOS-AK/GSA Workshop

Santa Clara, California – Nov 9, 2013 - Silvaco Sponsors Modeling of Systems and Parameter Extraction Working Group 6th International MOS-AK/GSA Workshop.


Location: Washington DC
Date: Dec. 11, 2013
Registration here
 Synopsis and Workshop Topics
  • HiTech forum to discuss the frontiers of electron device modeling with emphasis on simulation-aware models.
  • MOS-AK/GSA Meetings are organized with aims to strengthen a network and discussion forum among experts in the field, enhance open platform for information exchange related to compact/Spice modeling and Verilog-A standardization, bring people in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and CAD tool vendors. The topics cover all important aspects of compact model development, implementation, deployment and standardization within the main theme - frontiers of the compact modeling for nm-scale MEMS designs and CMOS/SOI circuit simulation.
  • The specific workshop goal will be to classify the most important directions for the future development of the electron device models, not limiting the discussion to compact models, but including physical, analytical and numerical models, to clearly identify areas that need further research and possible contact points between the different modeling domains. This workshop is outlined for device process engineers (CMOS, SOI, BiCMOS, SiGe) who are interested in device modeling; ICs designers (RF/Analog/Mixed-Signal/SoC) and those starting in that area as well as device characterization, modeling and parameter extraction engineers. The content will be beneficial for anyone who needs to learn what is really behind the IC simulation in modern device models.
Topics: to be covered include the following:
  • Advances in semiconductor technologies and processing
  • Compact Modeling (CM) of the electron devices
  • Verilog-A language for CM standardization
  • New CM techniques and extraction software
  • CM of passive, active, sensors and actuators
  • Emerging Devices, CMOS and SOI-based memory cells
  • Microwave, RF device modeling, high voltage device modeling
  • Nanoscale CMOS devices and circuits
  • Technology R&D, DFY, DFT and IC Designs
  • Foundry/Fabless Interface Strategies
provisionary list (in alphabetic order)
  • Mansun Chan, i-MOS, UST (HK)
  • Jose A. Diniz, CCS and FEEC/Unicamp (BR)
  • Keith Green, TI, CMC Chair (US)
  • Benjamin Iniguez, URV (SP)
  • Eric Keiter, Xyce Team, Sandia (US)
  • Luca Larcher, Uni. Modena (I)
  • Mark Lundstrom, NEEDS, NanoHub (US)
  • Mac McKeen, Microchip (US)
  • Thierry Poirou, CEA-LETI (F)
  • Michael Shur, RPI (US)
  • Sadayuki Yoshitomi, Toshiba (J)
  More info